In this example, we will study the performance of a semiconductor-insulator-semiconductor capacitor (SISCAP) Mach-Zehnder modulator using CHARGE (electrical simulation) and MODE (optical simulation).
Theory
In a Mach-Zehnder structure, changes to the effective index of the waveguide will result in a differential change in phase of the light propagating in that arm, which can be used to modulate an optical signal. In a SISCAP structure, charge is accumulated or depleted at the interface of a thin insulating region between two conductive arms [1, 2]. This change in effective index is driven by modulation of the carrier density in an electrically active waveguide. To simulate the distribution of the charge carriers, a self-consistent simulation of the charge and electrostatic potential is performed using CHARGE. To calculate the effect of the change in the carrier density on the waveguide loss and effective index, a MODE FDE simulation will be run. A np density grid attribute in MODE will take the carrier density information and calculate the corresponding changes in the real and imaginary parts of refractive index of the material according to a formulation in a work by Soref et al.. For a more detailed description of this structure group and the formula, please visit the section on Charge to index conversion.
Setup and Analysis
Electrical Simulation of Carrier Density
Open the siscap_eomod.ldev project file in CHARGE. The structure has been parametrized so that the key dimensions can be easily adjusted. Under the Setup Variables tab of the model properties, the properties are specified as
|
Name |
Default Value (nm) |
Description |
|
rc |
5 |
Corner radius for silicon layers in overlap region |
|
t_gap |
5 |
Oxide thickness between silicon arms |
|
t_soi |
110 |
Silicon arm thickness |
|
w_wg |
500 |
Overlap (waveguide) width |
To form the two overlapping arms of the structure, polygon objects are used (si_gate and si_wg). This enables the creation of rounded corners at the ends of the arms in the overlapping region, which avoids the non-physical electric fields that would result from a very sharp corner. An additional mesh override region is added to ensure a sufficiently fine mesh in the oxide layer between the two silicon arms.
Both the top and bottom arms of the modulator are defined as silicon regions, and are doped with a simple analytic doping profile corresponding to a uniform doping in the active (waveguide) region, and two contact diffusions (n++ and p++) for the gate (signal) and ground terminals. Two charge monitors record the electron and hole densities for export to the optical simulation. An electric field monitor surrounds the gate silicon, and is used to integrate the total charge on the gate by integrating the electric field through its surface (Gauss's law).
Two contacts are defined: gate and ground. A bias sweep from 0 to -2V is specified on the gate, driving the SISCAP into an accumulation mode. To accurately account for the charge accumulation under degenerate conditions, Fermi statistics are enabled (Device region Advanced). Run the simulation. The charge monitors will automatically record the electron and hole densities and save those to the files gate_carriers.mat and wg_carriers.mat.
Optical Simulation of Effective Index
Open the siscap_eomod.lms project file in MODE. The structure has been parametrized in the same way as in the CHARGE project file. In addition, a new optical material has been defined: silicon with carriers. This optical material will use the index of the Si (Silicon) - Palik model as its base, and apply the Soref and Bennet model to perturb that index based on the carrier density.
The carrier densities are supplied to the material model through the two NP density grid attribute objects, "gate np density" and "wg np density." Edit each of those NP density grid attribute models. In the editor, click "Import data..." and select the appropriate carrier density file that was exported from the previous CHARGE simulation (gate_carriers.mat or wg_carriers.mat). The carrier densities can be directly visualized by selecting grid attribute in the model tree and visualizing the charge dataset in the result viewer. Note that each dataset is parameterized by the bias voltage from the CHARGE simulation, and a specific bias voltage can be selected by adjusting the "_index" property of the grid attribute.
To perform a single eigenmode calculation, click Run to bring up the Eigensolver Analysis window, and click Calculate Modes. The resulting modes can be viewed in the Eigensolver Analysis window. To calculate the effective index as a function of bias voltage, a parameter sweep has been included in the Optimizations and Sweeps toolbox; the parameter sweep name is "voltage." Select this parameter sweep and run it. The parameter sweep will calculate the eigenmodes for each bias point by adjusting the "_index" property for both NP density grid attributes, and record the effective index of the fundamental mode.
Open the script file siscap_analyze_neff_v.lsf in the Script File Editor, and run the script. This will generate plots of the relative phase shift (rad.) for a 500um length arm and loss (dB/cm) assuming that the bias is being applied relative to the other arm of the Mach-Zehnder.
Static Capacitance Simulation
The SIS capacitance is simulated at DC by calculating the numerical derivative: C = dQ/dV. The total charge on the gate is automatically calculated by the electric field monitor. The monitor will integrate the electric field over the surface of monitor and use Gauss's law to determine the net charge enclosed in that volume. By running two simulations at bias voltage V and V+ΔV, the capacitance can be estimated as
$$C_{n, p} \approx \frac{Q_{n, p}(V+\Delta V)-Q_{n, p}(V)}{\Delta V}$$
Load the siscap_eomod_cv.ldev project in CHARGE. The script file siscap_gate_capacitance.lsf can be used to set up a DC sweep over the range from -2.4to 2.4V with a perturbation of ΔV=25mV at each step. The same script file will also perform the capacitance calculation and plot the results. Note that the simulation proceeds in two stages: first from 0 to -2.4V then from 0 to 2.4V. This is done to avoid additional initialization steps, which would be required to establish a good initial guess at a bias point far from equilibrium. The resulting capacitance per unit length is plotted below.
References
1. B. Milivojevic, et al., "112Gb/s DP-QPSK Transmission Over 2427km SSMF Using Small-Size Silicon Photonic IQ Modulator and Low-Power CMOS Driver", Proc. OFC/NFOEC, OTh1D1, (2013)
2. Montgomery, et al., "High-speed silicon-based electro-optic modulator", US Pat. 6845198, Jan. 18, 2005