Electrical sample and hold
Keywords
electrical, unidirectional
Ports
| Name | Type |
|---|---|
| input | Electrical Signal |
| trigger | Electrical Signal |
| output | Electrical Signal |
Properties
General Properties
| Name | Default value | Default unit | Range |
|---|---|---|---|
|
name Defines the name of the element. |
Sample And Hold | - | - |
|
annotate Defines whether or not to display annotations on the schematic editor. |
true | - | [true, false] |
|
enabled Defines whether or not the element is enabled. |
true | - | [true, false] |
|
type Defines the element unique type (read only). |
Sample And Hold | - | - |
|
description A brief description of the elements functionality. |
Electrical sample and hold | - | - |
|
prefix Defines the element name prefix. |
SH | - | - |
|
model Defines the element model name. |
- | - | - |
|
library Defines the element location or source in the library (custom or design kit). |
- | - | - |
|
local path Defines the local path or working folder $LOCAL for the element. |
- | - | - |
|
url An optional URL address pointing to the element online help. |
- | - | - |
Standard Properties
| Name | Default value | Default unit | Range |
|---|---|---|---|
|
trigger type Defines the trigger event (rising, falling or either) |
rising | - | [rising, falling, either |
Numerical Properties
| Name | Default value | Default unit | Range |
|---|---|---|---|
|
initial value The input signal initial value. |
0 | - | (-∞, +∞) |
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Implementation Details
A Sample and Hold circuit samples a continuously varying analog signal (voltage) and holds its value at a constant level for a specified period of time. The Sample and Hold circuits are often used in analog to digital converters to estimate variations in input signal.
Following is the circuit in the example file sample_and_hold_example.icp.
The input signal to the Sample and Hold model is a Sine wave at 1 GHz and the sample and hold is triggered by a Non Return to Zero (NRZ) electrical signal with alternative 1s and 0s at 25 GHz. The sample and hold is triggered at both rising and falling edge of the NRZ square wave. The sample and hold result is plotted overlaid with the sine wave and the trigger signal in the following figure.