All INTERCONNECT elements are inside the Root Element, representing the current simulation. Within 'Root Element', elements are listed as the user inserts them.
The Root Element also contains a list of global properties which all elements can inherit or break dependencies from. By default, all elements will inherit from the global properties of the Root Element (when applicable). These dependency relations can be added/modified by the user. The Root Element also functions as a Compound Element (the top-most element in the hierarchy of compound elements), and has all the functionalities including creating parameterized group objects by adding script code.
General properties
Name |
Default value |
Default unit |
Value range |
name Defines the name of the element. |
Root Element |
- |
- |
annotate Defines whether or not to display annotations on the schematic editor. |
true |
- |
[true, false] |
enabled Defines whether or not the element is enabled. |
true |
- |
[true, false] |
type Defines the element unique type (read only). |
Root Element |
- |
- |
description A brief description of the elements functionality. |
The top-most element in the hierarchy of compound elements |
- |
- |
library Defines the element location or source in the library (custom or design kit). |
- |
- |
- |
local path Defines the local path or working folder $LOCAL for the element. |
- |
- |
- |
url An optional URL address pointing to the element online help. |
- |
- |
- |
Thermal properties
Name |
Default value |
Default unit |
Value range |
temperature Defines the temperature. |
300 |
K |
(-∞, +∞) |
Enhanced properties
Name |
Default value |
Default unit |
Value range |
monitor data Defines whether or not to save monitor data to memory or to disk. |
save to disk |
- |
[save to memory, save to disk] |
monitor buffer size The monitor memory length affects the rate at which monitor buffers fill and must be flushed. Although a small buffer size requires less memory, it increases the rate at which buffers must be flushed. |
64 |
- |
[2, +∞) |
animate simulation Defines whether or not to animate the simulation, highlighting elements which are currently running and their correspondent threads. |
false |
- |
[true, false] |
animation delay Defines an additional delay for each element running time. |
0.5 |
s |
[0, +∞) |
simulation output Defines the type and whether or not simulation output is enable. |
disable |
- |
[disable, csv, psf] |
Numerical properties
Name |
Default value |
Default unit |
Value range |
multithreading The number of threads to be used in the calculation. If 'automatic', the number of processor cores will be used. |
user defined |
- |
[automatic, user defined] |
number of threads The user defined number of threads to be used in the calculation. |
4 |
- |
[1, +∞) |
Simulation properties
Name |
Default value |
Default unit |
Value range |
bitrate The output signal bitrate. |
25e+009 |
bits/s |
(0, +∞) |
simulation input The simulation input type. It defines the type of property used to calculate the number of samples, sample rate and time window. |
time window |
- |
[time window, sequence length, sample rate] |
samples per bit The number of samples per bit. |
64 |
- |
[1, 1e+009] |
sequence length The sequence length. |
128 |
- |
[1, 1e+009] |
time window The duration of the generated signal. This is typically set by the global properties in the root (top-most) element. |
5.12e-009 |
s |
(0, +∞) |
sample rate The sample rate of the generated signal. This is typically set by the global properties in the root (top-most) element. |
1.6e+012 |
Hz |
[0, +∞) |
number of samples The number of samples. |
8192 |
- |
[1, 1e+009] |
Simulation/Signal Mode properties
Name |
Default value |
Default unit |
Value range |
output signal mode The output signal mode. |
sample |
- |
[sample, block] |
number of output signals The number of simulation runs, or the number of generated signals. |
1 |
- |
[1, +∞) |
Simulation/Signal Mode/Sample properties
Name |
Default value |
Default unit |
Value range |
sample mode frequency band The sample mode frequency band estimation. If 'automatic', the center frequency and the number of bands will be adjusted automatically. If 'single', a single band (total field) with user defined center frequency will be used. |
automatic |
- |
[automatic, single] |
sample mode center frequency The sample mode reference center frequency for a single global band (total field). |
193.1 |
THz* *std. unit is Hz |
(0, +∞) |
Script properties
Name |
Default value |
Default unit |
Value range |
run setup script Defines whether to run setup script automatically or to force the setup script to run at the beginning of the simulation. |
automatic |
- |
[automatic, always] |
Design Kit/Header properties
Name |
Default value |
Default unit |
Value range |
component id A component identifier, defined when importing a schematic from a file. |
0 |
- |
- |
mcs filename The file containing a list of process design kit (pdk) names and correspondent pdk parameters. |
- |
- |
- |
mcs The process design kit name. |
- |
- |
- |
Validation properties
Name |
Default value |
Default unit |
Value range |
check disconnected ports Defines whether or not to check for disconnected ports and relay connections in the circuit. |
false |
- |
[true, false] |
check internal monitors Defines whether or not to check for monitors inside of compound elements. |
true |
- |
[true, false] |
check analyzer sensitivity Defines whether or not to check is signal level is bellow sensitivity level. |
false |
- |
[true, false] |
source connections Defines how do check connections to sources. Elements not connected to a source by default are not included in the simulation (resolve). To include all elements in the simulation regardless their connections use 'ignore' option. |
resolve |
- |
[resolve, test, ignore] |
deadlock resolution Defines how do resolve simulation deadlock. Insert delays to break probable deadlocks (prevent). Locate where deadlock occurs and automatically insert delays (resolve). To run the simulation and manually resolve simulation deadlock use 'ignore' option. |
prevent |
- |
[ignore, prevent, resolve] |
delay insertion Defines whether the simulator will add delays exclusively to bidirectional ports or to any output port. |
bidirectional ports |
- |
[output ports, bidirectional ports] |
Results
Name |
Description |
total elapsed time |
The amount of time that passed between the start and the end of a simulation. |