Ansys Lumerical Foundry Partnerships

Foundry PDK

Process Technology

• SOI
• SiN
• Epitaxial Ge

Ansys Lumerical-enabled Solutions

Component Design

• Foundry-compatible custom component design in Ansys Lumerical Multiphysics tools using Ansys Lumerical process file and layer builder.
• Dynamically transfer design layout in Cadence Virtuoso to 3D geometries in Lumerical Multiphysics tools.

Circuit Design

• Electro-optical integrated circuit design in INTERCONNECT for photonic simulation and Virtuoso for electro-optical co-simulation using INTERCONNECT compact models.
• Electro-optical integrated circuit design in Virtuoso using Ansys Verilog-A models.
• Yield analysis based on foundry process variations for circuits designed using both INTERCONNECT and Verilog-A models using Monte Carlo analysis utility.
• Transfer circuit schematic in INTERCONNECT to circuit layout in GDSFactory.

Foundry PDK

• SOI
• SiN

Ansys Lumerical-enabled Solutions

Component Design

• Foundry-compatible custom component design in Ansys Lumerical Multiphysics tools using Ansys Lumerical process file and layer builder.
• Dynamically transfer design layout in Cadence Virtuoso to 3D geometries in Lumerical Multiphysics tools.
•  Yield analysis based on foundry process variations in Lumerical Multiphysics tools using Monte Carlo analysis utility.

Circuit Design

• Electro-optical integrated circuit design using foundry PDK and custom Ansys Verilog-A models.

Foundry PDK

• PH18 (180nm Silicon Photonics)
• TPS45PH (45nm Silicon Photonics)

Ansys Lumerical-enabled Solutions

Component Design

• Foundry-compatible custom passive and active component design in Ansys Lumerical Multiphysics tools using Ansys Lumerical process file and layer builder.
• Dynamically transfer design layout in Virtuoso to 3D geometries in Lumerical Multiphysics tools.

Circuit Design

• Electro-optical integrated circuit design in INTERCONNECT for photonic simulation and Virtuoso for electro-optical co-simulation using INTERCONNECT compact models.
• Electro-optical integrated circuit design in Virtuoso using Ansys Verilog-A models.

Foundry PDK

TSMC COUPE^TM

Enabled Solutions

Custom Modelling for Co-design with TMI

Custom Verilog-A model design for Photonic Integrated Circuit Co-design with PDK TMI

Related Links: 2024 press release

Optical IO Design

Design of vertical fiber-to-chip coupling system for Co-Packaged Optics and In-Package Optical I/O applications​

Related Links: 2024 press release, 2025 press release, 2025 news release, Generic Example

Photonic Integrated Circuit Optimization

AI-Driven Photonic Integrated Circuit Optimization

Related Links: 2025 press release

To get access to TSMC COUPE^TM reference flows for above solutions, please contact TSMC.