Virtuoso interoperability - Optical transient analysis (OTRAN)

This page will demonstrate photonics time domain simulation using Optical Transient Analyzer (OTRAN) of INTERCONNECT simulator through EPDA environment. For the environment setup and license and tools requirement, please refer to the Tools & license requirement and Install EPDA environment to a new working directory pages.

Following are the detailed steps to setup and run an EPDA transient analysis (OTRAN) simulation.

Add and Create Design Libraries

Please refer to the EPDA Optical Network Analysis (ONA) work flow for the first two steps on adding and creation of design libraries. Sections:

• Add Design Libraries
• Create a Design Library 

Create Schematic Design

With the first two steps finished, the "ONA_OTRAN_example" library should be created. To create the schematic design for the ONTRAN simulation testbench, click on the "ONA_OTRAN_example" library and create a new cell view named "testBench" with "schematic" type: 

Click on "OK" and the Schematic Editor will be brought up. In the Schematic Editor create an amplitude modulator (AM) circuit by going to:

Create -> Instance

and adding the "Optical_Amplitude_Modulator" cell from the INTERCONNECTLib library. The properties of the amplitude modulator can be left as default:

Then use the same method and add the "CWLaser", "PIN_Photodetector" and "Sine_Wave" cells to the schematic editor and place them as shown below:

When adding the "Sine_Wave" instance, set its bias and amplitude to 0.5; and when adding the "PIN_Photodetector", set its noises (thermal and shot noises) to "false":

Then connect the models by using:

Create -> Wire (narrow)

The final schematic should look like below:

Check and save the schematic. Then, close the schematic editor.

Setup Netlist Config

After create the schematic, we can create a config view under the same testbench cell to configure circuit netlist. Set the Cell View type to "config":

Click on "OK" and the "New Configuration" window will pop up. Set the "View" to "schematic" to point the configuration to the testbench schematic. The "Global Bindings" setup configures hierarchy expansion rules for writing circuit netlist. For more information on Global Bindings, please refer to Cadence "Hierarchy Editor User Guide". In this example, set "View List" to "schematic INTERCONNECT" and "Stop List" to "INTERCONNECT" as shown below:

Click on "OK" and save the "Hierarchy Editor".

Setup ADE

Click on the "ADE Explorer" button in the "Hierarchy Editor" window and select "Create New View" in the pop-up "Launch ADE Explorer" window to bring up the "Create New ADE Explorer View" window.

Click on "OK" and the "ADE Explorer Editing" window will pop up. 

Set Simulator

In "ADE Explorer Editing" window, double click on the "Simulator" entry and select "INTERCONNECT" to be the simulator.

Open Design in Tab

Right click on the "ONA_OTRAN_example_testBench_1" entry and select "Open Design in Tab". 

Set Analyses and OTRAN Input

Then go back to "maestro" tab. Double click on the "Analyses" entry and config the analysis as shown below:

This Analysis form allows user to specify many OTRAN analysis properties and Root Element properties, e.g., signal bitrate and time window. For more information, please refer to the Root Element page for the details of the transient time domain simulation properties.

Set OTRAN simulation outputs

Add a result to the maestro window by going to:

Outputs -> Add -> Signal

and set its name to "output". Double click on the "Details" entry to bring up the schematic design again, then select the "output" port of the PIN_Photodetector as the output.

Save the configured ADE Explorer window. The configured ADE explorer window is shown below:

Setup Design Kits (optional)

User can also load the Compact Model Libraries (CMLs) to INTERCONNECT from Virtuoso. To do this, in the ADE explorer window go to:

Setup -> Design Kits

Then the INTERCONNECT Design Kit setup window will pop up. User can specify paths to CML folders.

Netlist and Run

In the ADE Explorer Editing window, update INTERCONNECT netlist of the circuit by selecting:

Simulation -> Netlist -> Create

The figure in below shows the generated INTERCONNECT netlist.

Once the netlist can be generated successfully, perform OTRAN simulation by:

Simulation -> Run

ADE will call out INTERCONNECT engine to perform optical simulation in backstage. User should see a pop-up log window indicating the status of the simulation. Once the simulation is completed, “Simulation completed successfully” will be shown in the log window, as shown in the figure in below. 

View results

Once OTRAN simulation is completed, user can view the result by using virtuoso Result Browsers in:

Tools -> Results Browser

A visualizer similar to the figure in below will be shown. In the file navigator on the left, go into the result by clicking on the file-tree:

ONA_OTRAN_example_testBench_1/psf -> I2 output -> I2

Select and plot the "output" result under the "Signals" tab. Result will show on the result window on the right hand side: