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Statistical PAM4 Transceiver - Virtuoso Interoperability

INTERCONNECT Virtuoso ADE Interoperability Photonic Integrated Circuits - Circuit

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Manufacturing variability has a significant impact on the performance of silicon photonic devices. As a photonic integrated circuit designer, it is important to understand how these variations will affect the expected output in order to predict important process outcomes such as yield. Statistical simulations based on foundry PDKs provide insight into these variations and allow designers to anticipate the actual performance of their circuit designs. This example demonstrates the capability of Spectre-INTERCONNECT co-simulation with statistical component models, allowing the performance of important tests such as Monte Carlo (MC) and corner analysis.

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Overview

Understand the simulation workflow and key results

In this example we consider a schematic-driven workflow where the circuit is designed using Virtuoso schematic editor and co-simulated with Spectre (for the electrical components) and INTERCONNECT (for the optical components). Note that the MC and corner analysis can be performed independently, and do not need to be run in this order.

The circuit is a PAM4 transceiver, consisting of a continuous-wave laser, a grating coupler, two MMI splitters, thermal phase shifters, PN junction phase shifters, a photodetector and an electrical circuit for the modulator driving signals. Using statistically enabled CMLs, we will obtain the eye diagrams of the process corners as well as the statistical distribution of signal levels. In this example, the waveguides, phase shifters, photodetector and MMIs have statistical models in the CML. Specifying correlations between the statistical parameters is not possible with this workflow, so these parameters will vary independently in the MC analysis.

Note: The PAM4_library compact model library (CML) used here is intended for demonstration purpose only. The models are intended to be representative of typical component behaviour, however they are not calibrated to a foundry process. Lumerical cannot provide any guarantee with respect to the model accuracy and completeness.

Run and results

Instructions for running the model and discussion of key results

Before beginning this example, make sure that you follow the Virtuoso interoperability installation instructions for simulation environment setup.

Prior to running any statistical simulations, it is important to have the test circuit set up and functioning properly. It is also necessary to install the CML libraries for both Virtuoso and INTERCONNECT.

Setup: PDK Installation and nominal simulation

  1. Launch INTERCONNECT.
  2. Locate the Elements Library window.
  3. Right click on “Design Kits”, select “Install”, then specify the path to the PAM4_library.cml file included with this example. Create a new directory for the INTERCONNECT design kit to be installed.
  4. Launch Virtuoso.
  5. Open the Virtuoso Library Manager (…/Tools/Library Manager).
  6. Add the “PAM4_library”, “analogLib”, “basic” and “opticalLib” libraries (Edit/Library Path). The “basic” and “opticalLib” libraries can be found in:

    <virtuoso installation directory>/tools.lnx86/dfII/etc/cdslib

    And the “analogLib” can be found in:

    <virtuoso installation directory>/tools.lnx86/dfII/etc/cdslib/artist

    The “PAM4_library” library is provided for download in this example.
  7. In the Library Manager, with “PAM4_library” library and “TestBench” cell selected, double click on the “schematic” view to visualize the schematic design. This example is a PAM4 transceiver with the following schematic design:

virtuoso_interop_statistical_schematic.png

  1. Return to the Library Manager window. Double click on “PAM4_library/TestBench/maestro” to open the ADE Explorer configuration session.
  2. In the ADE Explorer window, select Setup/Model Libraries. In the Model Libraries Setup window, under Model Files click “<Click here to add model files>” and select the PAM4_library.sec file in the directory where the INTERCONNECT design kit was installed in step 3. Select “nominal” from the dropdown list in the “Section” column for this Model File. Click “OK”.
  3. In the ADE Explorer window, select Setup/INTERCONNECT/Design Kit Setup. For the cdsLib field, specify the path to the cds.lib file created during the installation of EPDA environment . For Design Kit 1, specify the directory where the INTERCONNECT design kit was installed in step 3 (this directory should contain the PAM4_library.lib.x file). Make sure “nominal” is selected in the dropdown list next to the “Design Kit 1” field. Click “OK”.
  4. In the ADE Explorer window, select Setup/INTERCONNECT/Co-simulation Setup. Check ‘enable co-simulation' and click ‘OK’ to finish.
  5. Generate the Virtuoso and INTERCONNECT netlists by selecting Simulation/Netlist/Create.
  6. Click the run button. The running status will be updated and an INTERCONNECT session will be brought up for the optical simulation.

Results are plotted automatically when the simulation finishes running. The eye diagram shown here is for the circuit’s nominal values. The corner analysis and Monte Carlo results will be shown in the following steps.

nominal_eye_diagram.png

Step 1: Monte Carlo analysis

  1. To set up the MC Analysis, begin by checking the “Monte Carlo Sampling” option in the Setup Panel on the left-hand side of the ADE Explorer window.
  2. Underneath the “Monte Carlo Sampling” check box, select “Click to Open Setup Form.” Here you can select how many trials to run. Click “OK”.
  3. In the ADE Explorer Window, go to Setup/INTERCONNECT/Design Kit Setup. Choose the “statistical” option for Design Kit 1. Click “OK”.
  4. In the ADE Explorer Window, go to Setup/Model Libraries. Choose the “statistical” section for the Model File. Click “OK”.
  5. In the Outputs Setup, uncheck the “Eye Diagram” output, and select “level 0,” “level 1”, “level 2”, and “level 3”. This will plot the histograms of each PAM4 level once simulations complete.
  6. Generate the Virtuoso and INTERCONNECT netlists by selecting Simulation/Netlist/Create.
  7. Click the run button. The circuit will be run for the selected number of times. The histograms for each level will be plotted automatically when the simulation is finished running.

The following plot displays the histogram of the mean values from each level of the eye diagram, obtained using 100 trials. We can see that each level approximates a Gaussian distribution with the tails of the levels slightly overlapping.

MC_histograms.png

Step 2: Corner analysis

We will now perform corner analysis to determine the corner case results for this circuit based on process corners defined by the CML.

  1. To set up the corner analysis, begin by unchecking the “Monte Carlo Sampling” box and checking the box for “Corners” in the Setup Panel on the left-hand side of the ADE Explorer window.
  2. Underneath the Corners check box, select “Click to add corner.” This will open the Corners Setup window.
  3. Under “Model Files,” select “Click to add.” Select the PAM4_library.sec file, which will be in the directory where the INTERCONNECT CML was installed. This file provides a list of corner options for this statistical CML. Click “<section>” in the “C0” column and select “corner_1” from the dropdown list, and make sure the checkbox is checked. Do the same for the “C1” column and select “corner_2”. Your “Corners Setup” window should match the image below. Click “OK”.

corners_setup.png

  1. In the ADE Explorer Window, go to Setup/INTERCONNECT/Design Kit Setup. Choose the “nominal” option for Design Kit 1. Click “OK”. This step is to set the statistical variant for the ‘Norminal’ point of the Corners Setup shown in the previous step.
  2. In the ADE Explorer Window, go to Setup/Model Libraries. Choose the “nominal” section for the Model File. Click “OK”.
  3. In the Outputs Setup, check the “Eye Diagram” output, and uncheck the “level 0,” “level 1”, “level 2”, and “level 3” outputs. This will plot the eye diagrams of each corner once simulations complete.
  4. Generate the Virtuoso and INTERCONNECT netlists by selecting Simulation/Netlist/Create.
  5. Click the run button. The circuit will be run for the nominal value, followed by the fast and slow corners. This may take several minutes. The eye diagram results will be plotted automatically when the simulation is finished running.

The nominal result is the expected result for the design, and the corner_1 and corner_2 results estimate the corner cases of the result given the model statistical variant. Shown below are the eye diagrams for each of these corners, showing the expected maximum variation in the signal levels of the fabricated circuit.

corners_eye_diagram.png

Important model settings

Description of important objects and settings used in this model

CML

The optical components’ properties, including their statistical characteristics and process corners, are defined in the CML. The INTERCONNECT CML file PAM4_library.cml and Virtuoso library are provided with this example. The statistical variation of the models is defined in the .lib file PAM4_library.lib.x which is associated with the CML. These statistical parameters are determined by the foundry that produced the PDK, and should not be modified by the circuit designer.

Variant

The statistical variants for the statistical models are defined and encrypted in the .lib.x file. There are three types of variant that are defined in the file, namely the "nominal" variant, the "corner" variant and the "statistical" variant, for the nominal, corner and statistical parameter values, respectively. These statistical variant options are published in the .sec file of the same folder, for user’s reference. When the .lib file is loaded to the MC or corner analysis object, the variant properties defined in the .lib.x file will automatically be imported. The "nominal" and "corner" options are used for the corner analysis. The "statistical" option is used for the MC analysis.

Results

Additional post-processing of these basic results in Virtuoso can be used to obtain important circuit characteristics. For example, we can define a yield standard for the signal levels and then calculate the yield rate for the statistical models using the MC analysis results. We could also use the MC results to estimate the probability density function (pdf) of the signal levels and estimate the signal overlap for each level to calculate the symbol error rate (SER) and dispersion eye closure penalty quaternary (TDECQ).

Updating the model with your parameters

Instructions for updating the model based on your device parameters

This example is based on a PAM4 transceiver with the provided PAM4_library Virtuoso and INTERCONNECT CMLs. Users can apply the methodology described in this example to any circuit of interest, assuming it is based on a CML that contains statistical models.

Additional resources

Additional documentation, examples and training material

See also

Related Ansys Innovation Courses

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